1. Field of the Invention
The present invention relates to an adaptive equalizer which is used for minimizing degradation of transmission characteristics in high bit rate digital mobile communication, in which transmission characteristics are substantially degraded by waveform distortion due to frequency selective fading. The present invention also relates to a receiver which may be used in an environment attended with frequency selective fading.
2. Description of the Prior Art
There have heretofore been baseband waveform adaptive equalizers which are capable of tracking a rapid time-varying channel as in mobile communication and whose initial setting can be effected by a training process in a short period of time. One example of known adaptive equalizers of the type described above is a decision-feedback adaptive equalizer which is disclosed in Nakajima and Sampei, "Performance of a Decision Feedback Equalizer under Frequency Selective Fading in Land Mobile Communications", the Transaction of the Institute of Electronics, Information and Communication Engineers (B-II), J72-B-II, No. 10, pp. 513-523 (October 1989).
FIG. 42 is a block diagram of the decision-feedback adaptive equalizer disclosed in the above-mentioned literature, which is designed for a system in which the received signal is a Quaeternary Phase-Shift Keying (QPSK) modulation signal (transmission bit rate: 2/T bps; T is 1 symbol time).
In the figure, reference numeral 1 denotes a feedforward transversal filter (hereinafter referred to as "FF part") in which the tap interval is a predetermined delay time Tp (second) and the number of taps is L, and 2 a feedback transversal filter (hereinafter referred to as "FB part") in which the tap interval is a predetermined delay time T (second) and the number of taps is (M-L). An adder 3 adds together data output from the FF and FB parts 1 and 2. A decision circuit 4 identifies a data sequence output from the adder 3 every T sec. and makes a hard decision thereon. A tap-coefficient-update circuit 5 determines tap-coefficients for the FF part i and the FB part 2 every T sec. A switching circuit 6 functions such that either the output data sequence of the decision circuit 4 or a reference data sequence is selectively input to the FB part 2. Reference numeral 7 denotes a received signal input port of the decision-feedback adaptive equalizer, 8 a reference sequence input port, and 9 an output pore of the adaptive equalizer.
FIG. 43 shows one example of a burst format for signals employed in mobile communication.
The burst shown in FIG. 43 comprises a unique word (UW) 13 which is used for training of a decision-feedback adaptive equalizer and for establishing frame synchronization, random data a (information bits) 14, a color code (hereinafter referred to as "CC") 15 which is used for identification of a base station or as a training sequence for the equalizer, and random data b (information bits) 16.
The operation of the conventional decision-feedback adaptive equalizer will be explained below.
In the decision-feedback adaptive equalizer shown in FIG. 42, which is designed for a system in which the received signal is a QPSK modulation signal, the received signal is converted into a baseband signal by a demodulator, and channel characteristics are estimated by using the UW 13 (shown in FIG. 43), which is at the head of each burst, thus effecting convergence of the tap-coefficients (training mode). The signal input to the FB part 2 at this time is data without decision error, that is, a reference data sequence that is determined by the UW 13. Next, equalization is executed on the random data a 14, the CC 15 and the random data b 16 (tracking mode).
For the random data a 14 and the random data b 16, the signal output from the decision circuit 4 is input to the FB part 2 as a received signal sequence. For the CC 15, a reference data sequence that is determined by the CC 15 is input to the FB part 2.
The tap-coefficient-update circuit 5 updates the tap coefficients of the FF and FB parts 1 and 2 for each symbol according to a tap-coefficient-update algorithm, e.g., Kalman filter algorithm (RLS algorithm), by using the received signal sequence input to the decision-feedback adaptive equalizer, reference data sequences that are determined by the respective known training sequences of the UW 13 and the CC 15, the output data sequence of the decision circuit 4, and the output data from the adder 3.
As one example of the tap-coefficient-update algorithm, Kalman filter algorithm (RLS algorithm) will be briefly explained below.
It is assumed that the signal vector input to the equalizer at time t=nT (n=0,1,2, . . . ) is X.sub.M (n), the tapcoefficient is C.sub.M (n), the equalizer output is I(n), the desired output is d(n), and the error is e(n).
Here, X.sub.M (n), C.sub.M (n), I(n) and d(n) are complex numbers comprising in-phase and quadrature channels.
Assuming that the number of taps in the FF part 1 of the decision feedback adaptive equalizer is L and the total number of taps is M, the above factors are represented as follows: EQU X.sub.M (n)=[y.sub.1 *(n), . . . , y.sub.L *(n), d.sub.1 *(n),d.sub.2 *(n), . . . , d.sub.M-L *(n)]* (1) EQU C.sub.NM (n)=[C.sub.1 *(n),C.sub.2 *(n), . . . , C.sub.M *(n)](2) EQU I(n)=C.sub.M *(n-1)X.sub.M (n) (3) EQU e(n/n-1)=d(n)-I(n)=d(n)-C.sub.M *(n-1)X.sub.M (n) (4)
In the above equations * represents a complex conjugate transpose matrix (or vector).
In addition, d(n) is a known training sequence in the training mode, whereas in the tracking mode it is an output data sequence obtained from the decision circuit 4 as a result of a hard decision made on the result of Equation 3. The desired value in this algorithm is the tap-coefficient C.sub.M (n) which minimizes the estimation function .epsilon. represented by ##EQU1## where .lambda. represents the forgetting factor (0&lt;.lambda..ltoreq.1). C.sub.M (n) that minimizes Equation 5 is given by ##EQU2## where .delta. represents a positive constant. ##EQU3##
The algorithm for recursively obtaining C.sub.M (n) at time t=nT from C.sub.M (n-1) and P(n-1) at time t=(n-1)T is as follows: EQU K(n)=P(n-1)X.sub.M (n)/[.lambda.+X.sub.M * (n)P(n-1)X.sub.M (n)](9) EQU P(n)=[P(n-1)-K(n)X.sub.M *(n)P(n-1)] (10) EQU C.sub.M (n)=C.sub.M (n-1)+K(n)e*(n/n-1) (11) EQU P(O)=.delta..sup.-1 I, C.sub.M (O)=O (12)
where K(n) is the Kalman gain, P(n) the tapcoefficient error covariance matrix, and I the identity matrix.
It should be noted that the tap-coefficient-update algorithm is described in detail in S. Haykin, "Introduction to Adaptive Filters", Chapter 5, Gendai Kogaku-Sha (1987), translated by Tsuyoshi Takebe, and J. G. Proakis, "Digital Communications", Chapter 6.8, McGraw-Hill (1983).
In the foregoing, the decision-feedback adaptive equalizer, which is designed for a system in which the received signal is a QPSK modulation signal, as shown in FIG. 42, has been described; the following is consideration of a case where the received signal input to the abovedescribed adaptive equalizer is a .pi./4 shifted QPSK modulation signal (transmission bit rate: 2/T bps; T is symbol time).
Here, as one example of .pi./4 shifted QPSK modulation, an encoding scheme that is disclosed in EIA Document, IS-54, "Cellular System Dual-Mode Mobile Station Compatibility Standard" (Dec. 1990) will be shown, and the reference signal of the adaptive equalizer for the encoding scheme will also be explained.
FIG. 44 is a block diagram showing one example of a means for encoding a transmission data sequence according to the above encoding scheme.
Referring to FIG. 44, a transmission data sequence bm is converted sequentially from the first data by serial-to-parallel conversion in such a manner that odd-numbered data is converted into a data sequence X.sub.K, while even-numbered data is converted into a data sequence Y.sub.K. Then, (X.sub.K,Y.sub.K) is converted into a transmission data sequence (I.sub.K,Q.sub.K) by differential encoding according to Equations 13a and 13b: EQU K.sub.K =I.sub.K-1 cos[.DELTA.o(X.sub.K,Y.sub.K)]-Q.sub.K-1 sin[.DELTA.o(X.sub.K,Y.sub.K)] (13a) EQU Q.sub.K =I.sub.K-1 sin[.DELTA.o(X.sub.K,Y.sub.K)]+Q.sub.K-1 cos[.DELTA.o(X.sub.K,Y.sub.K)] (13b)
The phase change .DELTA.o is given according to the table shown in FIG. 45.
Assuming that the reference point (I.sub.1,Q.sub.1) is (2.sup.1/2,0) and that the transmission data sequence bm (1,-1,1,-1,1,-1, -1,1,-1,-1,-1,1,1,1,-1,1,1,1,1,-1,-1,1,-1,-1,1,-1,1,-1) is processed according to the above encoding scheme, it is converted into a differentially encoded data sequence (I.sub.K,Q.sub.K) shown in the table of FIG. 46.
Accordingly, when the transmission data sequence bm is the UW 13 or the CC 15, the data sequence (I.sub.K,Q.sub.K) shown in the table of FIG. 46 is used as a reference data sequence for the adaptive equalizer shown in FIG. 42.
Next, the decision circuit of the conventional adaptive equalizer will be explained.
In the decision-feedback adaptive equalizer shown in FIG. 42, a decision is made on the output of the adder 3 in the decision circuit 4 by using a method explained below:
First, the output (I.sup.I (K),I.sup.Q (K)) of the adder 3 (K represents the output data of the adder 3 for the K-th symbol) is sorted according to whether K is an odd number or an even number.
(a) When K is an odd number: the output (I.sup.I (K),I.sup.Q (K)) of the adder 3 is subjected to an arithmetic operation for .pi./4 phase rotation, and the phase-rotated data (I.sup.I' (K),I.sup.Q' (K)) is judged to determine a decision value (d.sup.I (K),d.sup.Q (K)) according to whether the sign of (I.sup.I' (K),I.sup.Q' (K)) is positive or negative, as shown in FIG. 47(a). PA1 (b) When K is an even number: the output (I.sup.I (K),I.sup.Q (K)) of the adder 3 is judged to determine a decision value (d.sup.I (K),d.sup.Q (K)) according to whether the sign of (I.sup.I (K),IQ(K)) is positive or negative, as shown in FIG. 47(b).
Further, the above decision value (i.e., the output of the decision circuit 4) is differentially decoded to obtain an equalized data sequence.
As has been described above, when the received signal input to the adaptive equalizer shown in FIG. 42 is a .pi./4 shifted QPSK modulation signal, the output (I.sup.I (K),I.sup.Q (K)) of the adder 3 is sorted according to whether K is an odd number or an even number. When K is an odd number, the output (I.sup.I (K),I.sup.Q (K)) of the adder 3 needs an arithmetic operation for .pi./4 phase rotation. Therefore, the number of arithmetic operations required in the decision circuit 4 increases, and the arrangement becomes complicated.
Conventional receivers used in time-division multiplex (TDM) or time-division multiple access (TDMA) communication include the one that is disclosed in Yamamoto and Kato, "TDMA Communications", the Institute of Electronics, Information and Communication Engineers (1989), for example.
FIG. 48 is a block diagram of a demodulator part including a frame synchronization system in the conventional receiver, disclosed in the above-mentioned reference.
In the figure, reference numeral 101 denotes an input port for a received IF signal. A demodulator 102 extracts a timing clock and data from the received IF signal and outputs them. A UW detector 103 performs UW detection on the basis of the data output from the demodulator 102 and outputs either a UW detection signal or a UW missed detection signal. A frame synchronization control circuit 104 effects frame synchronization control on receipt of the UW detection signal.
FIG. 49 is a block diagram showing exemplarly the internal arrangement of the UW detector 103 shown in FIG. 48.
In the figure, reference numerals 121 and 122 denote input ports for data of two quadrature channels Ich and Qch output from the demodulator 102, and 123 an input port for a recovered clock output from the demodulator 102. A correlator 124 receives the Ich data as an input signal and operates on the basis of the recovered clock supplied through the input port 123, while a correlator 125 receives the Qch data as an input signal and operates on the basis of the recovered clock supplied through the input port 123. An adder 126 adds together the outputs of the two correlators 124 and 125. A comparator 127 makes a comparison between the output of the adder 126 and a predetermined threshold and outputs a UW detection signal in accordance with the result of the comparison. Reference numeral 128 denotes an output port of the comparator 127.
FIG. 50 is a block diagram showing exemplarily the internal arrangement of the correlator 124 shown in FIG. 49.
In the figure, a correlator input port 130 is equivalent to the input port 121 of the UW detector 103.
Reference numeral 131 denotes an input port for the recovered clock. A shift register 132 has a number of stages corresponding to the UW length (unit symbol) for taking in the input signal and operates on the basis of the recovered clock. A register 133 has a number of stages corresponding to the UW length (unit symbol) for storing the Ich UW pattern. A multiplexer part 134 comprises multiplexers which are each arranged to multiply together a pair of corresponding bits of data stored in the shift register 132 and the register 133. An adder 135 adds together the outputs of the multiplexers constituting the multiplexer part 134. Reference numeral 136 denotes an output port of the adder 135.
It should be noted that the correlator 125 is arranged in the same way as the correlator 124 except that the register 133 in the correlator 125 stores the Qch UW pattern.
The operation of the UW detector 103 will be explained below with reference to FIGS. 48, 49 and 50.
In the correlator 124, the Ich data in the output of the demodulator 102 is input to the shift register 132, and the contents of the shift register 132 are shifted to the right in response to the recovered clock. Bits of data which are shifted to the right in the shift register 132 are multiplied in the respective multiplexers by the corresponding bits of the known Ich UW pattern (r.sub.1 to r.sub.N) stored in the register 133, and the resulting outputs of the multiplexers are input to the adder 135. The adder 135 adds together the outputs of the multiplexers and outputs a correlation value between the data stored in the shift register 132 and the register 133.
Similarly, the correlator 125 determines a correlation between the Qch data and the known Qch UW pattern and outputs a correlation value.
The respective outputs of the correlators 124 and 125 are added together in the adder 126. As a result, the total correlation value between the input data and the Ich and Qch UW patterns is input to the comparator 127.
The comparator 127 makes a comparison between the output value of the adder 126 and a predetermined threshold A. When the adder output value .gtoreq.A, the comparator 127 sends a UW detection signal to the frame synchronization control circuit 104, whereas, when the adder output value &lt;A, the comparator 127 sends a UW missed detection signal to the circuit 104. On receipt of the UW detection signal or the UW missed detection signal, the frame synchronization control circuit 104 recognizes the frame position and the synchronization state and then effects frame synchronization control.
It should be noted that the UW detector is detailed in the above-mentioned reference entitled "TDMA communications", at pp. 48.
In mobile communication where frequency selective fading is present in the channel, however, the conventional receiver arrangement shown in FIG. 48 suffers from degradation of the transmission characteristics, and there is therefore a demand for a receiver equipped with an adaptive equalizer as one of the measures to solve the problem.
The conventional adaptive equalizers, arranged as described above, suffer from problems as stated below:
When the received signal is a .pi./4 shifted QPSK modulation signal, the decision circuit of the adaptive equalizer needs to sort the output of the adder when making a decision and to execute an arithmetic operation for .pi./4 phase rotation, so that the number of arithmetic operations required in the decision circuit increases, resulting in a complicated arrangement.
In addition, if data decision errors occur successively due to rapid time-varying channel characteristics after the tap-coefficients have been made to converge to the optimum values by estimating the channel characteristics by use of the UW at the head of a burst in the presence of frequency selective fading, updating of the tap-coefficients cannot be effected in the direction in which the tap-coefficients converge to the optimum values, so that the bit error rate for data in the latter half of the burst increases.
In addition, since the bit error rate remains high until the tap-coefficients are made to converge to the optimum values by estimating channel characteristics by use of the UW at the head of a burst in the presence of frequency selective fading, the UW detection probability at the UW detector that uses the output of the decision circuit in the adaptive equalizer is low.
In addition, when the received signal input to the adaptive equalizer has a frequency offset due to the difference between the carrier frequency of the received signal and the local oscillator frequency of the receiver including the adaptive equalizer, equalization cannot be performed in such a manner as to follow up the phase change of the received signal caused by the frequency offset, so that the equalization characteristics degrade considerably.
The conventional receiver having the above-described arrangement suffers from the following problems.
To obtain synchronization for reception as a synchronization control procedure in the conventional receiver, a UW detection signal is obtained from data output from the demodulator, thereby effecting synchronization control.
However, if an adaptive equalizer is provided in the demodulator to cope with the fast variation of channel characteristics in the presence of frequency selective fading, it is necessary to know the UW position at the head of the burst in advance (that is, frame synchronization must be established in advance). However, since the UW position has not yet been known at the time of initial acquisition or hand off, the adaptive equalizer cannot operate, so that the receiver cannot start on its operation (that is, frame synchronization cannot be attained).
In addition, when a demodulator including an equalizer is used in the presence of frequency selective fading, it may be impossible to detect the UW position accurately because the output value of an incoherent correlator included in the demodulator depends on not only the input data pattern but also other factors due to rapid level variation caused by the fading.
In addition, when a demodulator including an adaptive equalizer is used, the adaptive equalizer cannot operate due to a frequency offset of the received signal at the time of initial acquisition or hand off, so that the UW position cannot be detected in the UW detector and hence frame synchronization control cannot be effected.